AI for Chip Design
NeurIPS 2026 Workshop
Date & Location: December 2026, Paris, France.
Call for Papers
Submit your latest research in AI-driven chip design.
Organizers
Meet the team behind the workshop.
Speakers
View our list of invited experts.
Committee
Our program committee and reviewers.
Sponsors
Our partners and supporters.
Contact
Get in touch with the organizers.
This workshop brings together researchers and practitioners working at the intersection of artificial intelligence and semiconductor design.
The workshop will explore advances in machine learning methods for chip design, including emerging AI-driven approaches for design automation, optimization, verification, and hardware-aware learning.
The goal is to foster discussion between the machine learning, electronic design automation, and hardware communities, and to identify new opportunities for AI-enabled chip development.
| Event | Date |
|---|---|
| Paper & Poster Submission | August 30, 2026 (AoE) |
| Notification | September 29, 2026 (AoE) |
| Camera-ready Deadline | October 9, 2026 (AoE) |
| Workshop | December 12th, 2026, Paris |
News
- July 26th 2026 - Submission site open
- July 22nd 2026 - Call for Papers published
- July 12th 2026 - Workshop accepted at NeurIPS 2026, Paris venue.
Submission
Submissions are now open! You can submit your work via OpenReview.
Topics of Interest
Topics include, but are not limited to:
- Machine learning for physical design: placement, routing, and floorplanning
- ML for RTL, logic synthesis, and technology mapping
- Timing, power, and area prediction and optimization
- Graph neural networks for circuits and netlists
- Generative models (e.g., diffusion, flow matching) for layout and design
- Reinforcement learning for EDA tasks, including script generation, testbench production, and module completion
- Large language models and foundation models for hardware description languages (Verilog, VHDL, and SystemVerilog)
- Agentic systems for chip design workflows with tool use (linters, synthesizers, simulators, timing analyzers, etc.)
- Reproducible benchmarks, datasets, and open-source infrastructure
- Societal, educational, and workforce aspects of AI-driven chip design
We particularly encourage submissions that promote reproducibility through open-source code, datasets, model weights, evaluation frameworks, or other openly available research artifacts.
Contact
For questions, please contact: neurips-ai-chip-design-2026@bsc.es